Field of the Invention
The present invention relates to a current detection circuit which detects a load current flowing through a load.
Background Art
A related art current detection circuit will be described.
FIG. 4 is a related art current detection circuit shown in Patent Document 1. The related art current detection circuit is comprised of a first resistor 201, a second resistor 202 having the same temperature characteristics as those of the first resistor 201, a differential amplifier circuit 300, a PMOS transistor 400, a resistive element 500, and a load 600.
A load current which flows through the load 600 flows into the first resistor 201, so that a voltage drop is generated by the first resistor 201. The differential amplifier circuit 300 controls a gate of the PMOS transistor 400 in such a manner that a voltage drop in the second resistor becomes equal to the voltage drop in the first resistor. Thus, a detection current determined by the ratio between the values of the first resistor 201 and the second resistor 202, and the value of the load current is generated and outputted from a drain of the PMOS transistor 400. This detection current flows through the resistive element 500, where it is converted into a voltage signal, which is in turn outputted.
In such a current detection circuit, one small in resistance value is used for the first resistor 201 to suppress the voltage drop to be small. Thus, the differential amplifier circuit 300 is required to have a wide in-phase input voltage in such a manner that it can normally be operated even in the case of an input voltage close to a power supply voltage.
A voltage detection circuit equipped with a differential amplifier circuit having a wide in-phase input voltage range, which is illustrated in FIG. 5, has been disclosed in, for example, Patent Document 2. The differential amplifier circuit 300 is comprised of PMOS transistors 301 and 302, and NMOS transistors 351 and 352.
The NMOS transistors 351 and 352 have gates connected in common and are operated as constant current sources by applying a constant bias voltage VBIS thereto. The PMOS transistors 301 and 302 are current-mirror connected and have sources respectively connected to a non-inversion input terminal and an inversion input terminal of the differential amplifier circuit 300. The PMOS transistors 301 and 302 are operated as input parts of the differential amplifier circuit 300. A PMOS transistor 252 is operated as a reference voltage circuit. A PMOS transistor 251 is an output transistor. The voltage detection circuit detects an output voltage VOUT of the output transistor.
The differential amplifier circuit 300 generates a difference between gate-source voltages of the PMOS transistors 301 and 302 according to a difference in potential between the non-inversion input terminal and the inversion input terminal and outputs a signal VDET corresponding to the difference voltage from an output terminal.
[Patent Document 1] Japanese Patent Application Laid-Open No. 2007-241411
[Patent Document 2] Japanese Patent Application Laid-Open No. 2007-166444